| Environment Settings | ||||
| Environment Variable | xst | ngdbuild | map | par |
| PATHEXT | .COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
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| Path | C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64; C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64; C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64; C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64; C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav; C:\Xilinx\14.7\ISE_DS\PlanAhead\bin; C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64; C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin; C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin; C:\Xilinx\14.7\ISE_DS\common\bin\nt64; C:\Xilinx\14.7\ISE_DS\common\lib\nt64; C:\ProgramData\Oracle\Java\javapath; C:\Windows\system32; C:\Windows; C:\Windows\System32\Wbem; C:\Windows\System32\WindowsPowerShell\v1.0\; C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common; C:\Program Files (x86)\MKVToolNix; C:\Program Files (x86)\Common Files\lenovo\easyplussdk\bin; C:\Program Files\Common Files\Autodesk Shared\; C:\Program Files (x86)\Autodesk\Backburner\; C:\Program Files (x86)\Windows Kits\10\Windows Performance Toolkit\; C:\MinGW\mingw32\bin; C:\MinGW\bin; C:\Program Files\MATLAB\R2016a\runtime\win64; C:\Program Files\MATLAB\R2016a\bin; C:\Program Files\MATLAB\R2016a\polyspace\bin; C:\Aldec\Active-HDL 10.1 64-bit\bin; C:\Users\ALIREZA\Anaconda3; C:\Users\ALIREZA\Anaconda3\Scripts; C:\Users\ALIREZA\Anaconda3\Library\bin; C:\Users\ALIREZA\AppData\Local\Programs\Python\Python35\Scripts\; C:\Users\ALIREZA\AppData\Local\Programs\Python\Python35\; C:\Program Files\Java\jdk1.8.0_45\bin; C:\Users\ALIREZA\Documents\; C:\Users\ALIREZA\AppData\Local\Microsoft\WindowsApps; E:\Programs (x64)\Jar2Exe Wizard\ |
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| XILINX | C:\Xilinx\14.7\ISE_DS\ISE\ | < data not available > | < data not available > | < data not available > |
| XILINX_DSP | C:\Xilinx\14.7\ISE_DS\ISE | < data not available > | < data not available > | < data not available > |
| XILINX_EDK | C:\Xilinx\14.7\ISE_DS\EDK | < data not available > | < data not available > | < data not available > |
| XILINX_PLANAHEAD | C:\Xilinx\14.7\ISE_DS\PlanAhead | < data not available > | < data not available > | < data not available > |
| Synthesis Property Settings | |||
| Switch Name | Property Name | Value | Default Value |
| -ifn | Controller.prj | ||
| -ifmt | mixed | MIXED | |
| -ofn | Controller | ||
| -ofmt | NGC | NGC | |
| -p | xc3s50-5-pq208 | ||
| -top | Controller | ||
| -opt_mode | Optimization Goal | Speed | SPEED |
| -opt_level | Optimization Effort | 1 | 1 |
| -iuc | Use synthesis Constraints File | NO | NO |
| -keep_hierarchy | Keep Hierarchy | No | NO |
| -netlist_hierarchy | Netlist Hierarchy | As_Optimized | as_optimized |
| -rtlview | Generate RTL Schematic | Yes | NO |
| -glob_opt | Global Optimization Goal | AllClockNets | ALLCLOCKNETS |
| -read_cores | Read Cores | YES | YES |
| -write_timing_constraints | Write Timing Constraints | NO | NO |
| -cross_clock_analysis | Cross Clock Analysis | NO | NO |
| -bus_delimiter | Bus Delimiter | <> | <> |
| -slice_utilization_ratio | Slice Utilization Ratio | 100 | 100% |
| -bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100% |
| -verilog2001 | Verilog 2001 | YES | YES |
| -fsm_extract | YES | YES | |
| -fsm_encoding | Auto | AUTO | |
| -safe_implementation | No | NO | |
| -fsm_style | LUT | LUT | |
| -ram_extract | Yes | YES | |
| -ram_style | Auto | AUTO | |
| -rom_extract | Yes | YES | |
| -shreg_extract | YES | YES | |
| -rom_style | Auto | AUTO | |
| -auto_bram_packing | NO | NO | |
| -resource_sharing | YES | YES | |
| -async_to_sync | NO | NO | |
| -mult_style | Auto | AUTO | |
| -iobuf | YES | YES | |
| -max_fanout | 100000 | 500 | |
| -bufg | 8 | 8 | |
| -register_duplication | YES | YES | |
| -register_balancing | No | NO | |
| -optimize_primitives | NO | NO | |
| -use_clock_enable | Yes | YES | |
| -use_sync_set | Yes | YES | |
| -use_sync_reset | Yes | YES | |
| -iob | Auto | AUTO | |
| -equivalent_register_removal | YES | YES | |
| -slice_utilization_ratio_maxmargin | 5 | 0% | |
| Operating System Information | ||||
| Operating System Information | xst | ngdbuild | map | par |
| CPU Architecture/Speed | Intel(R) Core(TM) i7-4710HQ CPU @ 2.50GHz/2494 MHz | < data not available > | < data not available > | < data not available > |
| Host | DESKTOP-ALIREZA | < data not available > | < data not available > | < data not available > |
| OS Name | Microsoft Windows Vista , 64-bit | < data not available > | < data not available > | < data not available > |
| OS Release | major release (build 6000) | < data not available > | < data not available > | < data not available > |